Responsibilities include but not limited to :
Oversees definition, design, verification, and documentation for SoC (System on a Chip) development.
Determines architecture design, logic design, and system simulation.
Defines module interfaces / formats for simulation.
Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.
Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.
Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.
Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results.
May also review vendor capability to support development.
Minimum Qualifications :
Must have Master's degree in Electrical / Computer Engineering with 8+ years of direct hands-on work experience in
ADC based SerDes design architectures
Digital design practices, including RTL coding in Verilog and running / debugging simulations
Preferred qualifications :
ASIC design flows for deep sub-micron technologies