Tech Staff Product Design Engineer
Microsemi Corporation
Burnaby, CA
48m ago

Job Description

As a Technical Staff Engineer, your job will entail the following :

  • Design of complex digital integrated circuits at the block, subsystem or device level (150M+ gates), which are coded in Verilog, System Verilog
  • Translate complex architectural requirements into microarchitecture that is realizable in targeted technology node
  • Lead and mentor fellow Design Engineers
  • Define subsystem / block feature sets, describe design and implementation details into engineering documents and registers documents
  • Support emulation, ASIC lab validation including lab debug and providing logic modifications and workarounds
  • Communicate regularly with the design and verification team in multiple locations to resolve issues, communicate status and solve technical problems
  • Communicate with architects to justify design implementation decisions and associated trade-offs
  • Read and understand applicable storage and computer interface protocol standards
  • Job Requirements

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or equivalent
  • 8+ years related experience
  • RTL Design - Experience in RTL Design using System Verilog, Verilog is required.
  • Experience and understanding of complex ASIC design flows, including block and chip level simulation and debug, logic synthesis, static timing analysis, layout and revision control
  • Experience with Formal Verification a plus.
  • Working knowledge of design and verification tools such as Synopsys Design Compiler, Cadence Incisive, waveform viewers, and other similar tools.
  • Experience using System Verilog, Verilog or VHDL is required.
  • Scripting and programming skills using csh, bash, perl, python, tcl, etc.
  • Protocol knowledge and experience in PCI-Express will be an asset
  • Knowledge of AHB / AXI bus protocols is desired.
  • Excellent knowledge in logic synthesis and static timing analysis.
  • Experience in designing the chip top level with IOs, pin out and package design
  • Worked with physical design teams for layout implementation.
  • Familiar with low power methodology and flows.
  • Capable of debugging EDA tool issues or design related issues.
  • Working knowledge of DFT.
  • Excellent analytical and debugging skills and the ability to proactively solve issues
  • Good verbal and written communication skills in English will be an asset
  • Excellent teamwork and time management skills, self-direction, the ability to work under pressure and the desire to excel in a competitive environment
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