Ciena may well be the most important technology company you’ve never heard of. The innovations that wow us (driverless cars), and those we now take for granted (the ability to mobile-stream your favorite show) are the products of ingenuity from some brilliant and forward-thinking companies.
But those companies rely on Ciena, another vanguard of innovation, to create and advance the underlying networks that bring their breakthroughs to our doorsteps.
VR, AI, IOT, 5G literally none of it would be possible without the mind-boggling technology that makes the internet itself work.
For more than 25 years, Ciena has been the global leader in networking strategy, and our technology has been part of the critical infrastructure running within the most advanced companies in the world.
Role overview overview of the focal points of this role
The successful candidate(s) will be part of the Signal Processing Team and will be involved with the design, development and verification of Forward Error Correction (FEC) algorithms and other Digital Signal Processing (DSP) algorithms for coherent optical modems.
Participate in the development and verification of FEC and DSP algorithms.
Evaluate and optimize design alternatives with respect to relevant performance metrics.
Implement the algorithms for integration in Application Specific Integrated Circuits (ASIC).
Write general specifications, test- and verification plans. Provide detailed explanations and justifications for design trade-offs.
Code functions in Matlab / C++ / CatapultC according to generally accepted coding standards.
Write C++ test cases using GoogleTest framework.
Run simulations, verify functions, and document results.
Automate system simulations including documentation and archiving of results.
Test and verify the algorithms implemented in hardware.
Use standard lab equipment; write test automation- and lab equipment interface functions.
Interface and collaborate with several research and development teams.
Provide feedback / suggestions on existing designs; contribute ideas to improve design procedures.
Why is this role important within Ciena? What impact can you expect to have?
The custom ASICs built in-house are a key market differentiator for Ciena. This role directly contributes to these ASICs and ensures Ciena’s continued leadership in the optical modem space.
What type of work environment will you be working in? Who are the key teams with whom you will interact?
Most of the work is done in an open-office environment, suitable for independent work as well as close collaboration between a few team members.
You will attend regular meetings to provide status updates as well as exchange technical information.
During integration time, work will be done in the lab (ESD protected environment).
You will interact with science-, system-, electro-optics-, hardware-, firmware-, board-, and link-budget teams.
What technical experience and / or professional and personal skills are required for this role?
Post-graduate degree in Physics or Engineering with focus on digital hardware, communication- and / or control systems.
Specific knowledge of various FEC codes, such as Reed-Solomon codes, Turbo product codes, low density parity check codes, etc.
and their respective performance.
Experience with the implementation and verification FEC algorithms in ASIC or FPGA.
Strong engineering math skills : Comfortable with linear algebra, complex numbers, FFT / IFFTs, Laplace transform, Z-transform, transfer functions, time / frequency domain signals, sampling theorem, correlation, convolution, modulation formats, probability, random variables, and statistics.
Understanding of optical systems, components, device physics, error analysis, and statistics.
Experience in laboratory measurement, test, and verification, including optical- and RF / microwave test equipment and usage (PMD / PDL emulators, polarization controllers, optical filters, lasers, OSA, oscilloscopes, etc.).
Good understanding of digital communication theory, signal processing, and control systems.
Strong lab debugging- and problem-solving skills.
Programming skills : Must have Matlab, C++ / C, and Python experience. Experience with HLS tools such as Catapult, Synphony C, VivadoHLS, etc. would be an asset.
Development environment : Linux, Git, Eclipse, googletest, Catapult.
Documentation / office tools : Confluence, Jira, MS Office.
Excellent technical writing and oral communications skills
Sense of humor