ASIC Design Verification Engineer - 93646
Advanced Micro Devices
Markham, Ontario, CA
il y a 5j

What you do at AMD changes everything

At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies building blocks for gaming, immersive platforms, and the data center.

Developing great technology takes more than talent : it takes amazing people who understand collaboration, respect, and who will go the extra mile to achieve unthinkable results.

It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.

If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

Title : ASIC Design Verification Engineer

The Role : We are currently looking for ASIC Design Verification Engineers who will be involved in all aspects of AMD's next generation Heterogeneous APU.

This includes verifying PCI Express design using latest UVM standard and develop comprehensive testplan to ensure coverage closure.

He / She will also apply low power verification methodology and measure overall system performance of our IP. The position allows exposure to all aspect of ASIC design stages.

A strong C++ / System Verilog language and problem solving skill is required. Good understanding of PCI Express and Computer Architecture is preferred.

Other technical knowledge such as Verilog, Perl, and OVL would be beneficial for testbench / simulation debug.

The Person :

  • Creative and innovator and thinker who loves technical problems and detail-oriented tasks
  • Exhibits relentless commitment to help the team meet quality and development goals on schedule
  • Drives to learn and perform at his or her highest potential in a technical capacity
  • Thrives in both a team environment and in individual contribution
  • Communicates openly and clearly in meetings, presentations, emails, and reports
  • Able to learn independently and acquire new skills required for the job
  • Flexible in working hours to accommodate working with co-workers in different time-zones
  • Responsibilities :

  • Writing / Implementing / Reviewing Test Plans
  • Developing Testbenches and Verification Components such as UVCs, models, BFMs, and Re-usable Verification Environments
  • Writing, Modifying, and Maintaining Random and Directed Test Cases and Libraries in SystemVerilog / UVM
  • Analyzing Functional, Code, and Test Plan Coverage
  • Implementing Assertions, Checkers, and Monitors
  • Utilizing In-House and 3rd Party IP / SOC CAD and EDA Tools for Design Verification
  • Deploying Industry-Leading Verification Methodologies such as UVM and Formal Verification
  • Triaging and Debugging Regressions
  • Reproducing Functional Bugs found in Silicon in Simulation and / or Formal Verification tools
  • Conducting and participating in Code Reviews
  • Technical leadership is an asset, including driving projects from start to the finish and Design verification sign-off
  • Preferred Skill set & Experience :

  • Digital Design in RTL, Verilog HDL
  • Testbench Architecture, SystemVerilog, OVM / UVM / VMM
  • C / C++, Java or other object-oriented programming language
  • Perl, Ruby, Shell-scripting, UNIX / LINUX Environment
  • vcs, ncsim, questa, or other simulator and associated waveform viewers such as verdi
  • PC System Architecture : PCI Express, HyperTransport, x86, ARM
  • On-Chip Bus Interfaces and Architectures : AMBA AXI, OCP, PIPE
  • Education :

  • Masters or Bachelors in Electrical or Computer Engineering
  • LI-AP1
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