Intermediate Embedded Firmware Verification Engineer for DDR PHY IP
Synopsys, Inc
CANADA - Ontario - Nepean, PORTUGAL - Porto, USA - Massachusetts - Boxborough
6h ago

Job Description and Requirements

Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars.

Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything where devices are getting smarter, everything’s connected, and everything must be secure.

Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them.

Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing.

Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.

Founded in 1986, $2.7B+ Synopsys employs 12,000+ headquartered in Mountain View, California, located globally in over 25 countries with 113+ offices throughout North America, Europe, Japan, Asia, and India.

Synopsys is committed to fostering an environment that treats people with respect, honesty and professionalism. We’re also committed to partnering with the communities in which we work.

Every year, Synopsys reaches out to local communities with resources and employee leadership to support education, science programs and a variety of other activities.

Come and be part of a collaborative team environment that innovates and develops the latest IP solutions that enable the way the world designs. Join US!

Intermediate Embedded Firmware Verification Engineer for DDR PHY IP

Responsibilities :

The Solutions Group is dedicated to providing our customers with a broad portfolio of leading edge IP. The Synopsys IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, interface IP, security IP, embedded processors, and subsystems.

Within the Solutions Group, the DDR Physical Layer (PHY) Group delivers leading edge DDR, LPDDR and HBM2 PHY solutions to our customers, whose products are used in computing devices including game consoles, graphics processors, smartphones, servers, and many more.

The DDR PHY IP includes an embedded processor to run embedded firmware applications which manage the complex operations associated with interacting with today’s advanced DDR technologies.

These embedded applications are an essential part of the DDR PHY IP.

You would be joining the DDR PHY Firmware Verification Team which is responsible for ensuring the overall function and quality of the embedded firmware applications delivered to our customers.

To achieve this, you will be building and evolving a System Verilog based Firmware / RTL / Mixed Signal verification environment.

Your interactions will span from Architecture, RTL, Firmware right through to the Mixed Signal design teams.

As part of our team, you will :

  • Own the critical interface to the Memory Model VIP team and work closely with them to ensure the memory models meet the current and future DDR PHY requirements
  • Create verification test plans based on firmware feature requirements
  • Develop the required test benches and test cases required to implement the test plan
  • Execute the test plan, debug any resulting failures and collect verification metrics
  • Develop and maintain infrastructure associated with the firmware verification environment
  • Participate in the diagnosis of customer firmware related failures
  • Assist in the firmware integration, debug and hardware bring up
  • Skills and Experience Requirements :

  • BSCS or BSCE with 3+ years of SOC verification experience
  • Experience with System Verilog verification environments
  • Understanding of UVM verification methodology
  • Excellent communication skills and comfortable interfacing with internal teams and customers
  • Understanding of DDR / LPDDR / HBM memory standards is essential
  • Strong advocate for structured verification and documentation processes
  • Scripting experience with Perl, Python, or Bash would be an asset.
  • Working knowledge of C would be an asset
  • Self-motivated and strong interest in software development and SOC verification
  • Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process.

    Should you require an accommodation, please contact .

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