ASIC Design Engineer - Multimedia / Audio
Qualcomm
Markham, Canada
20h ago

Job Overview

JOB FUNCTION : Qualcomm is the world's leading developer of next-generation wireless and multimedia technology andis committed to building a world-class organization that will lead the industry in Multimedia technology.

Be part of the Audio ASIC Design Team that is responsible for development of the Next Generation Multimedia LowPower Audio Subsystem that are key to delivering the best audio experiences in the smartphone, compute, automotive and IOT markets.

Your responsibilities will include :

  • Develop micro-architecture and module specifications for digital audio IP blocks including those that interface with the SoC
  • Implement modules and sub-systems and integrate IP from other teams in Verilog RTL
  • Analyze performance, area, power, and system cost tradeoffs for different implementations
  • Work with the design verification team to debug tests at the module, sub-system and SoC levels throughout the ASIC development cycle (pre and post-silicon)
  • Work with the implementation team to review synthesis results and reach static timing closure
  • Make significant contributions to silicon debug and analysis The best candidates have
  • Strong and proven experience with Verilog / VHDL
  • Experience with the current and latest Synopsys / Cadence / Mentor ASIC design and simulation tool sets
  • Experience being the owner / lead of team deliverables
  • Minimum Qualifications

  • Bachelor's degree in Science, Engineering, or related field.
  • 5+ years ASIC design, verification, or related work experience.
  • Preferred Qualifications

  • Proficiency with Verilog / VHDL RTL design languages
  • Strong understanding of ASIC / VLSI concepts
  • Experience with synthesis and timing closure
  • Detail oriented with strong analytical and debugging skills
  • Strong communication skills (written and verbal)
  • 8+ years ASIC design, verification, or related work experience
  • ASIC development experience with multi-media processing cores
  • Experience with leading-edge ASIC development tools from Synopsys, Mentor, or Cadence
  • Knowledge of bus interface protocols (AXI, AHB, APB)
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