As a Staff SerDes Physical Implementation Engineer , the successful candidate will work on a variety of advanced SERDES developments including the latest 56 / 112G PAM4 standards.
In this role, you will be responsible for the Physical Implementation of high speed interface IPs and test-chips, driving all aspects from RTL to GDS including timing and physical sign-off, in close interaction and collaborative team work with multiple functional groups (front end, analog, CAD) and the product team.
The Mixed-Signal IP organization is seeking a highly motivated individual responsible for the physical implementation of complex Mixed signal IPs and testchips across multiple process technologies with a specific focus on very advanced high speed SERDES platforms.
The successful candidate will have the following :
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